VLSI Test Principles and Architectures
Design for Testability

The most up-to-date coverage available of VLSI Testing and Design-for-Testability!

Laung-Terng Wang (Author), Cheng-Wen Wu (Author), Xiaoqing Wen (Author), Khader S. Abdel-Hafez (Contributions by), Wen-Ben Jone (Contributions by), Rohit Kapur (Contributions by), Brion Keller (Contributions by), Kuen-Jong Lee (Contributions by), James C.-M. Li (Contributions by), Mike Peng Li (Contributions by), Xiaowei Li (Contributions by), T.M. Mak (Contributions by), Yinghua Min (Contributions by), Benoit Nadeau-Dostie (Contributions by), Soumendu Bhattacharya (Contributions by), Mehrdad Nourani (Contributions by), Janusz Rajski (Contributions by), Charles Stroud (Contributions by), Erik H. Volkerink (Contributions by), Duncan M. (Hank) Walker (Contributions by), Shianling Wu (Contributions by), Nur A. Touba (Contributions by), Abhijit Chatterjee (Contributions by), Xinghao Chen (Contributions by), Kwang-Ting (Tim) Cheng (Contributions by), William Eklow (Contributions by), Michael S. Hsiao (Contributions by), Jiun-Lang Huang (Contributions by), Shi-Yu Huang (Contributions by)

9780123705976, Elsevier Science

Hardback, published 14 August 2006

808 pages, Approx. 500 illustrations
23.4 x 19 x 4.1 cm, 1.77 kg

"In the era of large systems embedded in a single system-on-chip (SOC) and fabricated continuously shrinking technologies, it is important to ensure correct behavior of the whole system. Electronic design and test engineers of today have to deal with these complex and heterogeneous systems (digital, mixed-signal, memory), but few have the possibility to study the whole field in a detailed and deep way. This book provides an extremely broad knowledge of the discipline, covering the fundamentals in detail, as well as the most recent and advanced concepts." --Michel Renovell, Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier (LIRMM), Montpellier, France

"This book combines in a unique way insight into industry practices commonly found in commercial DFT tools but not discussed in textbooks, and a sound treatment of the future fundamentals. The comprehensive review of future test technology trends, including self-repair, soft error protection, MEMS testing, and RF testing, leads students and researchers to advanced DFT research." --Hans-Joachim Wunderlich, University of Stuttgart, Germany

"Recent advances in semiconductor manufacturing have made design for testability (DFT) an essential part of nanometer designs. I am pleased to find a DFT textbook of this comprehensiveness that can serve both academic and professional needs." --Andre Ivanov, University of British Columbia, Canada

"This is the most recent book covering all aspects of digital systems testing. It is a “must read? for anyone focused on learning modern test issues, test research, and test practices." --Kewal K. Saluja, University of Wisconsin-Madison

"By covering the basic DFT theory and methodology on digital, memory, as well as analog and mixed-signal (AMS) testing, this book stands out as one best reference book that equips practitioners with testable SOC design skills." --Yihe Sun, Tsinghua University, Beijing, China

This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time-to-volume.

Chapter 1 – Introduction
Chapter 2 – Design for Testability
Chapter 3 – Logic and Fault Simulation
Chapter 4 – Test Generation
Chapter 5 – Logic Built-In Self-Test
Chapter 6 – Test Compression
Chapter 7 – Logic Diagnosis
Chapter 8 – Memory Testing and Built-In Self-Test
Chapter 9 – Memory Diagnosis and Built-In Self-Repair
Chapter 10 – Boundary Scan and Core-Based Testing
Chapter 11 – Analog and Mixed-Signal Testing
Chapter 12 – Test Technology Trends in the Nanometer Age

Subject Areas: Automatic control engineering [TJFM], Electronic devices & materials [TJFD], Circuits & components [TJFC], Engineering skills & trades [TGX]