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Verilog Coding for Logic Synthesis

Weng Fook Lee (Author)

9780471429760, Wiley

Hardback, published 13 May 2003

336 pages, Drawings: 114 B&W, 0 Color; Tables: 28 B&W, 0 Color
23.9 x 16.3 x 2.1 cm, 0.596 kg

Provides a practical approach to Verilog design and problem solving.
* Bulk of the book deals with practical design problems that design engineers solve on a daily basis.
* Includes over 90 design examples.
* There are 3 full scale design examples that include specification, architectural definition, micro-architectural definition, RTL coding, testbench coding and verification.
* Book is suitable for use as a textbook in EE departments that have VLSI courses

Table of Figures.

Table of Examples.

List of Tables.

Preface.

Acknowledgments.

Trademarks.

Introduction.

Asic Design Flow.

Verilog Coding.

Coding Style: Best-Known Method for Synthesis.

Design Example of Programmable Timer.

Design Example of Programmable Logic Block for Peripheral Interface.

Subject Areas: Electronics & communications engineering [TJ]

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