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Resource Efficient LDPC Decoders
From Algorithms to Hardware Architectures
Teaches the modern techniques to design, model and analyze low complexity LDPC algorithms and their hardware implementation
Vikram Arkalgud Chandrasetty (Author), Syed Mahfuzul Aziz (Author)
9780128112557
Paperback, published 5 December 2017
190 pages
23.4 x 19 x 1.3 cm, 0.39 kg
Approx.174 pages
1. Introduction2. Overview of LDPC codes3. Structure and flexibility of LDPC codes4. LDPC decoding algorithms5. LDPC decoder architectures6. Hardware implementation of LDPC decoder7. LDPC decoders in multimedia communication8. Prospective LDPC applications AppendixA : Sample C-Programs and MATLAB models for LDPC code construction and simulationB : Sample Verilog HDL codes for implementation of fully-parallel LDPC decoder architectureC : Sample Verilog HDL codes for implementation of partially-parallel LDPC decoder architecture
Subject Areas: Communications engineering / telecommunications [TJK], Electronics & communications engineering [TJ]
