A Designer's Guide to Asynchronous VLSI

Create low power, higher performance circuits with shorter design times using this practical guide to asynchronous design.

Peter A. Beerel (Author), Recep O. Ozdag (Author), Marcos Ferretti (Author)

9780521872447, Cambridge University Press

Hardback, published 4 February 2010

352 pages, 278 b/w illus. 9 tables 74 exercises
25.4 x 18 x 2.1 cm, 0.84 kg

Create low power, higher performance circuits with shorter design times using this practical guide to asynchronous design. This practical alternative to conventional synchronous design enables performance close to full-custom designs with design times that approach commercially available ASIC standard cell flows. It includes design trade-offs, specific design examples, and end-of-chapter exercises. Emphasis throughout is placed on practical techniques and real-world applications, making this ideal for circuit design students interested in alternative design styles and system-on-chip circuits, as well as circuit designers in industry who need new solutions to old problems.

1. Introduction
2. Channel-based asynchronous design
3. Modeling channel-based designs
4. Pipeline performance
5. Performance analysis and optimization
6. Deadlock
7. A taxonomy of design styles
8. Synthesis-based controller design
9. Micropipeline design
10. Syntax-directed translation
11. QDI pipeline templates
12. Timed pipeline templates
13. Single-track pipeline templates
14. Asynchronous crossbar.

Subject Areas: Circuits & components [TJFC], Electronics engineering [TJF], Electrical engineering [THR], Engineering: general [TBC]