{"product_id":"professional-cuda-c-programming-paperback-softback-9781118739327","title":"Professional CUDA C Programming (Paperback \/ softback) 9781118739327","description":"\u003cfont face=\"Georgia\"\u003e\r\n\u003cp\u003e\u003cfont size=\"6\"\u003eProfessional CUDA C Programming\u003c\/font\u003e\u003cbr\u003e\r\n\r\n\r\n\r\n\r\n\r\n\u003c\/p\u003e\n\u003cp\u003e\u003cfont size=\"4\"\u003eJohn Cheng (Author), Max Grossman (Author), Ty McKercher (Author)\u003c\/font\u003e\u003c\/p\u003e\r\n\r\n\u003cp\u003e\u003cfont size=\"3\"\u003e9781118739327, Wiley\u003c\/font\u003e\u003c\/p\u003e\r\n\r\n\u003cp\u003e\u003cfont size=\"3\"\u003ePaperback \/ softback, published 7 October 2014\u003c\/font\u003e\u003c\/p\u003e\r\n\r\n\u003cp\u003e\u003cfont size=\"3\"\u003e528 pages\u003cbr\u003e23.1 x 18.8 x 3 cm, 0.862 kg\u003c\/font\u003e\u003c\/p\u003e\r\n\r\n\r\n\r\n\r\n\r\n\u003cp align=\"justify\"\u003e\u003cstrong\u003e\u003cfont size=\"3\"\u003e\u003cp\u003e\u003cb\u003eBreak into the powerful world of parallel GPU programming \u003c\/b\u003e\u003cb\u003ewith this down-to-earth, practical guide\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003eDesigned for professionals across multiple industrial sectors, \u003ci\u003eProfessional CUDA C Programming  \u003c\/i\u003epresents CUDA -- a parallel computing platform and programming model designed to ease the development of GPU programming -- fundamentals in an easy-to-follow format, and teaches readers how to think in parallel and implement parallel algorithms on GPUs. Each chapter covers a specific topic, and includes workable examples that demonstrate the development process, allowing readers to explore both the \"hard\" and \"soft\" aspects of GPU programming.\u003c\/p\u003e \u003cp\u003eComputing architectures are experiencing a fundamental shift toward scalable parallel computing motivated by application requirements in industry and science. This book demonstrates the challenges of efficiently utilizing compute resources at peak performance, presents modern techniques for tackling these challenges, while increasing accessibility for professionals who are not necessarily parallel programming experts. The CUDA programming model and tools empower developers to write high-performance applications on a scalable, parallel computing platform: the GPU. However, CUDA itself can be difficult to learn without extensive programming experience. Recognized CUDA authorities John Cheng, Max Grossman, and Ty McKercher guide readers through essential GPU programming skills and best practices in \u003ci\u003eProfessional CUDA C Programming\u003c\/i\u003e, including:\u003c\/p\u003e \u003cul\u003e \u003cli\u003eCUDA Programming Model\u003c\/li\u003e \u003cli\u003eGPU Execution Model\u003c\/li\u003e \u003cli\u003eGPU Memory model\u003c\/li\u003e \u003cli\u003eStreams, Event and Concurrency\u003c\/li\u003e \u003cli\u003eMulti-GPU Programming\u003c\/li\u003e \u003cli\u003eCUDA Domain-Specific Libraries\u003c\/li\u003e \u003cli\u003eProfiling and Performance Tuning\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003eThe book makes complex CUDA concepts easy to understand for anyone with knowledge of basic software development with exercises designed to be both readable and high-performance. For the professional seeking entrance to parallel computing and the high-performance computing community, \u003ci\u003eProfessional CUDA C Programming\u003c\/i\u003e is an invaluable resource, with the most current information available on the market.\u003c\/p\u003e\u003c\/font\u003e\u003c\/strong\u003e\u003c\/p\u003e\r\n\r\n\u003cp\u003e\u003cfont size=\"3\"\u003e\u003cp\u003eForeword xvii\u003c\/p\u003e \u003cp\u003ePreface xix\u003c\/p\u003e \u003cp\u003eIntroduction xxi\u003c\/p\u003e \u003cp\u003e\u003cb\u003eChapter 1: Heterogeneous Parallel Computing with CUDA 1\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003eParallel Computing 2\u003c\/p\u003e \u003cp\u003eSequential and Parallel Programming 3\u003c\/p\u003e \u003cp\u003eParallelism 4\u003c\/p\u003e \u003cp\u003eComputer Architecture 6\u003c\/p\u003e \u003cp\u003eHeterogeneous Computing 8\u003c\/p\u003e \u003cp\u003eHeterogeneous Architecture 9\u003c\/p\u003e \u003cp\u003eParadigm of Heterogeneous Computing 12\u003c\/p\u003e \u003cp\u003eCUDA: A Platform for Heterogeneous Computing 14\u003c\/p\u003e \u003cp\u003eHello World from GPU 17\u003c\/p\u003e \u003cp\u003eIs CUDA C Programming Difficult? 20\u003c\/p\u003e \u003cp\u003eSummary 21\u003c\/p\u003e \u003cp\u003e\u003cb\u003eChapter 2: CUDA Programming Model 23\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003eIntroducing the CUDA Programming Model 23\u003c\/p\u003e \u003cp\u003eCUDA Programming Structure 25\u003c\/p\u003e \u003cp\u003eManaging Memory 26\u003c\/p\u003e \u003cp\u003eOrganizing Threads 30\u003c\/p\u003e \u003cp\u003eLaunching a CUDA Kernel 36\u003c\/p\u003e \u003cp\u003eWriting Your Kernel 37\u003c\/p\u003e \u003cp\u003eVerifying Your Kernel 39\u003c\/p\u003e \u003cp\u003eHandling Errors 40\u003c\/p\u003e \u003cp\u003eCompiling and Executing 40\u003c\/p\u003e \u003cp\u003eTiming Your Kernel 43\u003c\/p\u003e \u003cp\u003eTiming with CPU Timer 44\u003c\/p\u003e \u003cp\u003eTiming with nvprof 47\u003c\/p\u003e \u003cp\u003eOrganizing Parallel Threads 49\u003c\/p\u003e \u003cp\u003eIndexing Matrices with Blocks and Threads 49\u003c\/p\u003e \u003cp\u003eSumming Matrices with a 2D Grid and 2D Blocks 53\u003c\/p\u003e \u003cp\u003eSumming Matrices with a 1D Grid and 1D Blocks 57\u003c\/p\u003e \u003cp\u003eSumming Matrices with a 2D Grid and 1D Blocks 58\u003c\/p\u003e \u003cp\u003eManaging Devices 60\u003c\/p\u003e \u003cp\u003eUsing the Runtime API to Query GPU Information 61\u003c\/p\u003e \u003cp\u003eDetermining the Best GPU 63\u003c\/p\u003e \u003cp\u003eUsing nvidia-smi to Query GPU Information 63\u003c\/p\u003e \u003cp\u003eSetting Devices at Runtime 64\u003c\/p\u003e \u003cp\u003eSummary 65\u003c\/p\u003e \u003cp\u003e\u003cb\u003eChapter 3: CUDA Execution Model 67\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003eIntroducing the CUDA Execution Model 67\u003c\/p\u003e \u003cp\u003eGPU Architecture Overview 68\u003c\/p\u003e \u003cp\u003eThe Fermi Architecture 71\u003c\/p\u003e \u003cp\u003eThe Kepler Architecture 73\u003c\/p\u003e \u003cp\u003eProfile-Driven Optimization 78\u003c\/p\u003e \u003cp\u003eUnderstanding the Nature of Warp Execution 80\u003c\/p\u003e \u003cp\u003eWarps and Thread Blocks 80\u003c\/p\u003e \u003cp\u003eWarp Divergence 82\u003c\/p\u003e \u003cp\u003eResource Partitioning 87\u003c\/p\u003e \u003cp\u003eLatency Hiding 90\u003c\/p\u003e \u003cp\u003eOccupancy 93\u003c\/p\u003e \u003cp\u003eSynchronization 97\u003c\/p\u003e \u003cp\u003eScalability 98\u003c\/p\u003e \u003cp\u003eExposing Parallelism 98\u003c\/p\u003e \u003cp\u003eChecking Active Warps with nvprof 100\u003c\/p\u003e \u003cp\u003eChecking Memory Operations with nvprof 100\u003c\/p\u003e \u003cp\u003eExposing More Parallelism 101\u003c\/p\u003e \u003cp\u003eAvoiding Branch Divergence 104\u003c\/p\u003e \u003cp\u003eThe Parallel Reduction Problem 104\u003c\/p\u003e \u003cp\u003eDivergence in Parallel Reduction 106\u003c\/p\u003e \u003cp\u003eImproving Divergence in Parallel Reduction 110\u003c\/p\u003e \u003cp\u003eReducing with Interleaved Pairs 112\u003c\/p\u003e \u003cp\u003eUnrolling Loops 114\u003c\/p\u003e \u003cp\u003eReducing with Unrolling 115\u003c\/p\u003e \u003cp\u003eReducing with Unrolled Warps 117\u003c\/p\u003e \u003cp\u003eReducing with Complete Unrolling 119\u003c\/p\u003e \u003cp\u003eReducing with Template Functions 120\u003c\/p\u003e \u003cp\u003eDynamic Parallelism 122\u003c\/p\u003e \u003cp\u003eNested Execution 123\u003c\/p\u003e \u003cp\u003eNested Hello World on the GPU 124\u003c\/p\u003e \u003cp\u003eNested Reduction 128\u003c\/p\u003e \u003cp\u003eSummary 132\u003c\/p\u003e \u003cp\u003e\u003cb\u003eChapter 4: Global Memory 135\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003eIntroducing the CUDA Memory Model 136\u003c\/p\u003e \u003cp\u003eBenefits of a Memory Hierarchy 136\u003c\/p\u003e \u003cp\u003eCUDA Memory Model 137\u003c\/p\u003e \u003cp\u003eMemory Management 145\u003c\/p\u003e \u003cp\u003eMemory Allocation and Deallocation 146\u003c\/p\u003e \u003cp\u003eMemory Transfer 146\u003c\/p\u003e \u003cp\u003ePinned Memory 148\u003c\/p\u003e \u003cp\u003eZero-Copy Memory 150\u003c\/p\u003e \u003cp\u003eUnified Virtual Addressing 156\u003c\/p\u003e \u003cp\u003eUnified Memory 157\u003c\/p\u003e \u003cp\u003eMemory Access Patterns 158\u003c\/p\u003e \u003cp\u003eAligned and Coalesced Access 158\u003c\/p\u003e \u003cp\u003eGlobal Memory Reads 160\u003c\/p\u003e \u003cp\u003eGlobal Memory Writes 169\u003c\/p\u003e \u003cp\u003eArray of Structures versus Structure of Arrays 171\u003c\/p\u003e \u003cp\u003ePerformance Tuning 176\u003c\/p\u003e \u003cp\u003eWhat Bandwidth Can a Kernel Achieve? 179\u003c\/p\u003e \u003cp\u003eMemory Bandwidth 179\u003c\/p\u003e \u003cp\u003eMatrix Transpose Problem 180\u003c\/p\u003e \u003cp\u003eMatrix Addition with Unified Memory 195\u003c\/p\u003e \u003cp\u003eSummary 199\u003c\/p\u003e \u003cp\u003e\u003cb\u003eChapter 5: Shared Memory and Constant Memory 203\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003eIntroducing CUDA Shared Memory 204\u003c\/p\u003e \u003cp\u003eShared Memory 204\u003c\/p\u003e \u003cp\u003eShared Memory Allocation 206\u003c\/p\u003e \u003cp\u003eShared Memory Banks and Access Mode 206\u003c\/p\u003e \u003cp\u003eConfiguring the Amount of Shared Memory 212\u003c\/p\u003e \u003cp\u003eSynchronization 214\u003c\/p\u003e \u003cp\u003eChecking the Data Layout of Shared Memory 216\u003c\/p\u003e \u003cp\u003eSquare Shared Memory 217\u003c\/p\u003e \u003cp\u003eRectangular Shared Memory 225\u003c\/p\u003e \u003cp\u003eReducing Global Memory Access 232\u003c\/p\u003e \u003cp\u003eParallel Reduction with Shared Memory 232\u003c\/p\u003e \u003cp\u003eParallel Reduction with Unrolling 236\u003c\/p\u003e \u003cp\u003eParallel Reduction with Dynamic Shared Memory 238\u003c\/p\u003e \u003cp\u003eEffective Bandwidth 239\u003c\/p\u003e \u003cp\u003eCoalescing Global Memory Accesses 239\u003c\/p\u003e \u003cp\u003eBaseline Transpose Kernel 240\u003c\/p\u003e \u003cp\u003eMatrix Transpose with Shared Memory 241\u003c\/p\u003e \u003cp\u003eMatrix Transpose with Padded Shared Memory 245\u003c\/p\u003e \u003cp\u003eMatrix Transpose with Unrolling 246\u003c\/p\u003e \u003cp\u003eExposing More Parallelism 249\u003c\/p\u003e \u003cp\u003eConstant Memory 250\u003c\/p\u003e \u003cp\u003eImplementing a 1D Stencil with Constant Memory 250\u003c\/p\u003e \u003cp\u003eComparing with the Read-Only Cache 253\u003c\/p\u003e \u003cp\u003eThe Warp Shuffle Instruction 255\u003c\/p\u003e \u003cp\u003eVariants of the Warp Shuffle Instruction 256\u003c\/p\u003e \u003cp\u003eSharing Data within a Warp 258\u003c\/p\u003e \u003cp\u003eParallel Reduction Using the Warp Shuffle Instruction 262\u003c\/p\u003e \u003cp\u003eSummary 264\u003c\/p\u003e \u003cp\u003e\u003cb\u003eChapter 6: Streams and Concurrency 267\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003eIntroducing Streams and Events 268\u003c\/p\u003e \u003cp\u003eCUDA Streams 269\u003c\/p\u003e \u003cp\u003eStream Scheduling 271\u003c\/p\u003e \u003cp\u003eStream Priorities 273\u003c\/p\u003e \u003cp\u003eCUDA Events 273\u003c\/p\u003e \u003cp\u003eStream Synchronization 275\u003c\/p\u003e \u003cp\u003eConcurrent Kernel Execution 279\u003c\/p\u003e \u003cp\u003eConcurrent Kernels in Non-NULL Streams 279\u003c\/p\u003e \u003cp\u003eFalse Dependencies on Fermi GPUs 281\u003c\/p\u003e \u003cp\u003eDispatching Operations with OpenMP 283\u003c\/p\u003e \u003cp\u003eAdjusting Stream Behavior Using Environment Variables 284\u003c\/p\u003e \u003cp\u003eConcurrency-Limiting GPU Resources 286\u003c\/p\u003e \u003cp\u003eBlocking Behavior of the Default Stream 287\u003c\/p\u003e \u003cp\u003eCreating Inter-Stream Dependencies 288\u003c\/p\u003e \u003cp\u003eOverlapping Kernel Execution and Data Transfer 289\u003c\/p\u003e \u003cp\u003eOverlap Using Depth-First Scheduling 289\u003c\/p\u003e \u003cp\u003eOverlap Using Breadth-First Scheduling 293\u003c\/p\u003e \u003cp\u003eOverlapping GPU and CPU Execution 294\u003c\/p\u003e \u003cp\u003eStream Callbacks 295\u003c\/p\u003e \u003cp\u003eSummary 297\u003c\/p\u003e \u003cp\u003e\u003cb\u003eChapter 7: Tuning Instruction-Level Primitives 299\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003eIntroducing CUDA Instructions 300\u003c\/p\u003e \u003cp\u003eFloating-Point Instructions 301\u003c\/p\u003e \u003cp\u003eIntrinsic and Standard Functions 303\u003c\/p\u003e \u003cp\u003eAtomic Instructions 304\u003c\/p\u003e \u003cp\u003eOptimizing Instructions for Your Application 306\u003c\/p\u003e \u003cp\u003eSingle-Precision vs. Double-Precision 306\u003c\/p\u003e \u003cp\u003eStandard vs. Intrinsic Functions 309\u003c\/p\u003e \u003cp\u003eUnderstanding Atomic Instructions 315\u003c\/p\u003e \u003cp\u003eBringing It All Together 322\u003c\/p\u003e \u003cp\u003eSummary 324\u003c\/p\u003e \u003cp\u003e\u003cb\u003eChapter 8: GPU-Accelerated CUDA Libraries and OpenACC 327\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003eIntroducing the CUDA Libraries 328\u003c\/p\u003e \u003cp\u003eSupported Domains for CUDA Libraries 329\u003c\/p\u003e \u003cp\u003eA Common Library Workflow 330\u003c\/p\u003e \u003cp\u003eThe CUSPARSE Library 332\u003c\/p\u003e \u003cp\u003ecuSPARSE Data Storage Formats 333\u003c\/p\u003e \u003cp\u003eFormatting Conversion with cuSPARSE 337\u003c\/p\u003e \u003cp\u003eDemonstrating cuSPARSE 338\u003c\/p\u003e \u003cp\u003eImportant Topics in cuSPARSE Development 340\u003c\/p\u003e \u003cp\u003ecuSPARSE Summary 341\u003c\/p\u003e \u003cp\u003eThe cuBLAS Library 341\u003c\/p\u003e \u003cp\u003eManaging cuBLAS Data 342\u003c\/p\u003e \u003cp\u003eDemonstrating cuBLAS 343\u003c\/p\u003e \u003cp\u003eImportant Topics in cuBLAS Development 345\u003c\/p\u003e \u003cp\u003ecuBLAS Summary 346\u003c\/p\u003e \u003cp\u003eThe cuFFT Library 346\u003c\/p\u003e \u003cp\u003eUsing the cuFFT API 347\u003c\/p\u003e \u003cp\u003eDemonstrating cuFFT 348\u003c\/p\u003e \u003cp\u003ecuFFT Summary 349\u003c\/p\u003e \u003cp\u003eThe cuRAND Library 349\u003c\/p\u003e \u003cp\u003eChoosing Pseudo- or Quasi- Random Numbers 349\u003c\/p\u003e \u003cp\u003eOverview of the cuRAND Library 350\u003c\/p\u003e \u003cp\u003eDemonstrating cuRAND 354\u003c\/p\u003e \u003cp\u003eImportant Topics in cuRAND Development 357\u003c\/p\u003e \u003cp\u003eCUDA Library Features Introduced in CUDA 6 358\u003c\/p\u003e \u003cp\u003eDrop-In CUDA Libraries 358\u003c\/p\u003e \u003cp\u003eMulti-GPU Libraries 359\u003c\/p\u003e \u003cp\u003eA Survey of CUDA Library Performance 361\u003c\/p\u003e \u003cp\u003ecuSPARSE versus MKL 361\u003c\/p\u003e \u003cp\u003ecuBLAS versus MKL BLAS 362\u003c\/p\u003e \u003cp\u003ecuFFT versus FFTW versus MKL 363\u003c\/p\u003e \u003cp\u003eCUDA Library Performance Summary 364\u003c\/p\u003e \u003cp\u003eUsing OpenACC 365\u003c\/p\u003e \u003cp\u003eUsing OpenACC Compute Directives 367\u003c\/p\u003e \u003cp\u003eUsing OpenACC Data Directives 375\u003c\/p\u003e \u003cp\u003eThe OpenACC Runtime API 380\u003c\/p\u003e \u003cp\u003eCombining OpenACC and the CUDA Libraries 382\u003c\/p\u003e \u003cp\u003eSummary of OpenACC 384\u003c\/p\u003e \u003cp\u003eSummary 384\u003c\/p\u003e \u003cp\u003e\u003cb\u003eChapter 9: Multi-GPU Programming 387\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003eMoving to Multiple GPUs 388\u003c\/p\u003e \u003cp\u003eExecuting on Multiple GPUs 389\u003c\/p\u003e \u003cp\u003ePeer-to-Peer Communication 391\u003c\/p\u003e \u003cp\u003eSynchronizing across Multi-GPUs 392\u003c\/p\u003e \u003cp\u003eSubdividing Computation across Multiple GPUs 393\u003c\/p\u003e \u003cp\u003eAllocating Memory on Multiple Devices 393\u003c\/p\u003e \u003cp\u003eDistributing Work from a Single Host Thread 394\u003c\/p\u003e \u003cp\u003eCompiling and Executing 395\u003c\/p\u003e \u003cp\u003ePeer-to-Peer Communication on Multiple GPUs 396\u003c\/p\u003e \u003cp\u003eEnabling Peer-to-Peer Access 396\u003c\/p\u003e \u003cp\u003ePeer-to-Peer Memory Copy 396\u003c\/p\u003e \u003cp\u003ePeer-to-Peer Memory Access with Unified Virtual Addressing 398\u003c\/p\u003e \u003cp\u003eFinite Difference on Multi-GPU 400\u003c\/p\u003e \u003cp\u003eStencil Calculation for 2D Wave Equation 400\u003c\/p\u003e \u003cp\u003eTypical Patterns for Multi-GPU Programs 401\u003c\/p\u003e \u003cp\u003e2D Stencil Computation with Multiple GPUs 403\u003c\/p\u003e \u003cp\u003eOverlapping Computation and Communication 405\u003c\/p\u003e \u003cp\u003eCompiling and Executing 406\u003c\/p\u003e \u003cp\u003eScaling Applications across GPU Clusters 409\u003c\/p\u003e \u003cp\u003eCPU-to-CPU Data Transfer 410\u003c\/p\u003e \u003cp\u003eGPU-to-GPU Data Transfer Using Traditional MPI 413\u003c\/p\u003e \u003cp\u003eGPU-to-GPU Data Transfer with CUDA-aware MPI 416\u003c\/p\u003e \u003cp\u003eIntra-Node GPU-to-GPU Data Transfer with CUDA-Aware MPI 417\u003c\/p\u003e \u003cp\u003eAdjusting Message Chunk Size 418\u003c\/p\u003e \u003cp\u003eGPU to GPU Data Transfer with GPUDirect RDMA 419\u003c\/p\u003e \u003cp\u003eSummary 422\u003c\/p\u003e \u003cp\u003e\u003cb\u003eChapter 10: Implementation Considerations 425\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003eThe CUDA C Development Process 426\u003c\/p\u003e \u003cp\u003eAPOD Development Cycle 426\u003c\/p\u003e \u003cp\u003eOptimization Opportunities 429\u003c\/p\u003e \u003cp\u003eCUDA Code Compilation 432\u003c\/p\u003e \u003cp\u003eCUDA Error Handling 437\u003c\/p\u003e \u003cp\u003eProfile-Driven Optimization 438\u003c\/p\u003e \u003cp\u003eFinding Optimization Opportunities Using nvprof 439\u003c\/p\u003e \u003cp\u003eGuiding Optimization Using nvvp 443\u003c\/p\u003e \u003cp\u003eNVIDIA Tools Extension 446\u003c\/p\u003e \u003cp\u003eCUDA Debugging 448\u003c\/p\u003e \u003cp\u003eKernel Debugging 448\u003c\/p\u003e \u003cp\u003eMemory Debugging 456\u003c\/p\u003e \u003cp\u003eDebugging Summary 462\u003c\/p\u003e \u003cp\u003eA Case Study in Porting C Programs to CUDA C 462\u003c\/p\u003e \u003cp\u003eAssessing crypt 463\u003c\/p\u003e \u003cp\u003eParallelizing crypt 464\u003c\/p\u003e \u003cp\u003eOptimizing crypt 465\u003c\/p\u003e \u003cp\u003eDeploying Crypt 472\u003c\/p\u003e \u003cp\u003eSummary of Porting crypt 475\u003c\/p\u003e \u003cp\u003eSummary 476\u003c\/p\u003e \u003cp\u003eAppendix: Suggested Readings 477\u003c\/p\u003e \u003cp\u003eIndex 481\u003c\/p\u003e\u003c\/font\u003e\u003c\/p\u003e\r\n\r\n\u003cp\u003e\u003cfont size=\"3\"\u003eSubject Areas: Computer science [\u003ca title=\"See our other books on Computer science\" href=\"https:\/\/freshlyprintedbooks.co.uk\/search?q=%22Computer%20science%20%5BUY%5D%22\"\u003eUY\u003c\/a\u003e]\u003c\/font\u003e\u003c\/p\u003e\r\n\r\n\r\n\u003c\/font\u003e","brand":"Wrox","offers":[{"title":"Brand New","offer_id":52472105369880,"sku":"9781118739327","price":39.29,"currency_code":"GBP","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0730\/2037\/5320\/files\/9781118739327.jpg?v=1785717137","url":"https:\/\/freshlyprintedbooks.co.uk\/products\/professional-cuda-c-programming-paperback-softback-9781118739327","provider":"Freshly Printed Books","version":"1.0","type":"link"}