{"product_id":"power-distribution-network-design-for-vlsi-hardback-9780471657200","title":"Power Distribution Network Design for VLSI (Hardback) 9780471657200","description":"\u003cfont face=\"Georgia\"\u003e\r\n\u003cp\u003e\u003cfont size=\"6\"\u003ePower Distribution Network Design for VLSI\u003c\/font\u003e\u003cbr\u003e\r\n\r\n\r\n\r\n\r\n\r\n\u003c\/p\u003e\n\u003cp\u003e\u003cfont size=\"4\"\u003eQing K. Zhu (Author)\u003c\/font\u003e\u003c\/p\u003e\r\n\r\n\u003cp\u003e\u003cfont size=\"3\"\u003e9780471657200, Wiley\u003c\/font\u003e\u003c\/p\u003e\r\n\r\n\u003cp\u003e\u003cfont size=\"3\"\u003eHardback, published 5 March 2004\u003c\/font\u003e\u003c\/p\u003e\r\n\r\n\u003cp\u003e\u003cfont size=\"3\"\u003e218 pages\u003cbr\u003e24.3 x 16.1 x 1.7 cm, 0.449 kg\u003c\/font\u003e\u003c\/p\u003e\r\n\r\n\r\n\r\n\u003cp align=\"justify\"\u003e\u003cem\u003e\u003cfont size=\"3\"\u003e\"This book is useful for professionals looking to study the power network for Ices.\" (\u003ci\u003eIEEE Circuits \u0026amp; Devices\u003c\/i\u003e, July\/August 2006)  \u003cp\u003e\"…valuable reference for engineers, students, and researchers.\" (\u003ci\u003eComputing Reviews.com\u003c\/i\u003e, June 10, 2004\u003c\/p\u003e\u003c\/font\u003e\u003c\/em\u003e\u003c\/p\u003e\r\n\r\n\u003cp align=\"justify\"\u003e\u003cstrong\u003e\u003cfont size=\"3\"\u003eA hands-on troubleshooting guide for VLSI network designers\u003cbr\u003e The primary goal in VLSI (very large scale integration) power network design is to provide enough power lines across a chip to reduce voltage drops from the power pads to the center of the chip. Voltage drops caused by the power network's metal lines coupled with transistor switching currents on the chip cause power supply noises that can affect circuit timing and performance, thus providing a constant challenge for designers of high-performance chips.\u003cbr\u003e Power Distribution Network Design for VLSI provides detailed information on this critical component of circuit design and physical integration for high-speed chips. A vital tool for professional engineers (especially those involved in the use of commercial tools), as well as graduate students of engineering, the text explains the design issues, guidelines, and CAD tools for the power distribution of the VLSI chip and package, and provides numerous examples for its effective application.\u003cbr\u003e Features of the text include:\u003cbr\u003e * An introduction to power distribution network design\u003cbr\u003e * Design perspectives, such as power network planning, layout specifications, decoupling capacitance insertion, modeling, and analysis\u003cbr\u003e * Electromigration phenomena\u003cbr\u003e * IR drop analysis methodology\u003cbr\u003e * Commands and user interfaces of the VoltageStorm(TM) CAD tool\u003cbr\u003e * Microprocessor design examples using on-chip power distribution\u003cbr\u003e * Flip-chip and package design issues\u003cbr\u003e * Power network measurement techniques from real silicon\u003cbr\u003e The author includes several case studies and a glossary of key words and basic terms to help readers understand and integrate basic concepts in VLSI design and power distribution.\u003c\/font\u003e\u003c\/strong\u003e\u003c\/p\u003e\r\n\r\n\u003cp\u003e\u003cfont size=\"3\"\u003ePreface.  \u003cp\u003e\u003cb\u003e1 Introduction.\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e1.1 Power Supply Noise.\u003c\/p\u003e \u003cp\u003e1.2 Power Network Modeling.\u003c\/p\u003e \u003cp\u003e1.3 Modelling of Switching Currents.\u003c\/p\u003e \u003cp\u003e1.4 On-Chip Decoupling Capacitance.\u003c\/p\u003e \u003cp\u003e1.5 On-Chip Inductance.\u003c\/p\u003e \u003cp\u003e1.6 Process Scaling Impacts.\u003c\/p\u003e \u003cp\u003e1.7 Summary.\u003c\/p\u003e \u003cp\u003e\u003cb\u003e2 Design Perspectives.\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e2.1 Planning for Communication Chips.\u003c\/p\u003e \u003cp\u003e2.2 Planning for Microprocessor Chips.\u003c\/p\u003e \u003cp\u003e2.3 IBM CAD Methodology.\u003c\/p\u003e \u003cp\u003e2.4 Design for \u003ci\u003eIR\u003c\/i\u003e Drop.\u003c\/p\u003e \u003cp\u003e2.5 Package-Level Methodology.\u003c\/p\u003e \u003cp\u003e2.6 Summary.\u003c\/p\u003e \u003cp\u003e\u003cb\u003e3 Electromigration.\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e3.1 Basic Definitions and EM Rules.\u003c\/p\u003e \u003cp\u003e3.2 EM Analysis Tool.\u003c\/p\u003e \u003cp\u003e3.3 Full-Chip EM Methodology.\u003c\/p\u003e \u003cp\u003e3.4 Summary.\u003c\/p\u003e \u003cp\u003e\u003cb\u003e4\u003c\/b\u003e \u003cb\u003e\u003ci\u003eIR\u003c\/i\u003e\u003c\/b\u003e \u003cb\u003eVoltage Drop.\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e4.1 Causes of \u003ci\u003eIR\u003c\/i\u003e Drop.\u003c\/p\u003e \u003cp\u003e4.2 Overview of \u003ci\u003eIR\u003c\/i\u003e Analysis.\u003c\/p\u003e \u003cp\u003e4.3 Static Analysis Approach.\u003c\/p\u003e \u003cp\u003e4.4 Dynamic Analysis Approach.\u003c\/p\u003e \u003cp\u003e4.5 Circuit Analysis with \u003ci\u003eIR\u003c\/i\u003e Drop Impacts.\u003c\/p\u003e \u003cp\u003e4.6 Summary.\u003c\/p\u003e \u003cp\u003e\u003cb\u003e5 Power Grid Analysis.\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e5.1 Introduction.\u003c\/p\u003e \u003cp\u003e5.2 Executing the Tool.\u003c\/p\u003e \u003cp\u003e5.3 Advanced Static Analysis.\u003c\/p\u003e \u003cp\u003e5.4 Dynamic Analysis.\u003c\/p\u003e \u003cp\u003e5.5 Layout Exploration.\u003c\/p\u003e \u003cp\u003e5.6 Summary.\u003c\/p\u003e \u003cp\u003e\u003cb\u003e6 Microprocessor Design Examples.\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e6.1 Intel IA-32 Pentium-III.\u003c\/p\u003e \u003cp\u003e6.2 Sun UltraSPARC.\u003c\/p\u003e \u003cp\u003e6.3 Hitachi SuperH Microprocessor.\u003c\/p\u003e \u003cp\u003e6.4 IBM S\/390 Microprocessor.\u003c\/p\u003e \u003cp\u003e6.5 Sun SPARC 64b Microprocessor.\u003c\/p\u003e \u003cp\u003e6.6 Intel IA-64 Microprocessor.\u003c\/p\u003e \u003cp\u003e6.7 Summary.\u003c\/p\u003e \u003cp\u003e\u003cb\u003e7 Package and I\/O Design for Power Delivery.\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e7.1 Flip-Chip Package.\u003c\/p\u003e \u003cp\u003e7.2 Simultaneous Switching Noise (SSN).\u003c\/p\u003e \u003cp\u003e7.3 Case Study of a Microprocessor-Like Chip.\u003c\/p\u003e \u003cp\u003e7.4 Power Supply Measurement.\u003c\/p\u003e \u003cp\u003e7.5 I\/O Pads for Power\/Ground Supplies.\u003c\/p\u003e \u003cp\u003e\u003cb\u003eGlossary.\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e\u003cb\u003eReferences.\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e\u003cb\u003eIndex.\u003c\/b\u003e\u003c\/p\u003e\u003c\/font\u003e\u003c\/p\u003e\r\n\r\n\u003cp\u003e\u003cfont size=\"3\"\u003eSubject Areas: Electronics \u0026amp; communications engineering [\u003ca title=\"See our other books on Electronics \u0026amp; communications engineering\" href=\"https:\/\/freshlyprintedbooks.co.uk\/search?q=%22Electronics%20\u0026amp;%20communications%20engineering%20%5BTJ%5D%22\"\u003eTJ\u003c\/a\u003e]\u003c\/font\u003e\u003c\/p\u003e\r\n\r\n\r\n\u003c\/font\u003e","brand":"Wiley-Interscience","offers":[{"title":"Brand New","offer_id":52298023174424,"sku":"9780471657200","price":89.29,"currency_code":"GBP","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0730\/2037\/5320\/files\/9780471657200.jpg?v=1781731296","url":"https:\/\/freshlyprintedbooks.co.uk\/products\/power-distribution-network-design-for-vlsi-hardback-9780471657200","provider":"Freshly Printed Books","version":"1.0","type":"link"}