{"product_id":"mosfet-models-for-spice-simulation-including-bsim3v3-and-bsim4-hardback-9780471396970","title":"MOSFET Models for SPICE Simulation; Including BSIM3v3 and BSIM4 (Hardback) 9780471396970","description":"\u003cfont face=\"Georgia\"\u003e\r\n\u003cp\u003e\u003cfont size=\"6\"\u003eMOSFET Models for SPICE Simulation\u003c\/font\u003e\u003cbr\u003e\r\n\u003cfont size=\"5\"\u003eIncluding BSIM3v3 and BSIM4\u003c\/font\u003e\u003c\/p\u003e\r\n\r\n\r\n\r\n\r\n\u003cp\u003e\u003cfont size=\"4\"\u003eWilliam Liu (Author)\u003c\/font\u003e\u003c\/p\u003e\r\n\r\n\u003cp\u003e\u003cfont size=\"3\"\u003e9780471396970, Wiley\u003c\/font\u003e\u003c\/p\u003e\r\n\r\n\u003cp\u003e\u003cfont size=\"3\"\u003eHardback, published 23 January 2001\u003c\/font\u003e\u003c\/p\u003e\r\n\r\n\u003cp\u003e\u003cfont size=\"3\"\u003e600 pages\u003cbr\u003e23.6 x 16.2 x 3.1 cm, 0.844 kg\u003c\/font\u003e\u003c\/p\u003e\r\n\r\n\r\n\r\n\r\n\r\n\u003cp align=\"justify\"\u003e\u003cstrong\u003e\u003cfont size=\"3\"\u003eBeim integrierten Schaltkreisdesign spielt die Schaltkreissimulation eine wesentliche Rolle, wobei deren Genauigkeit von der Genauigkeit des verwendeten Transistormodells abhängig ist. BSIM3 (BSIM steht für Berkley Short-channel IGFET Model) wurde als erstes MOSFET Modell zur Standardisierung ausgewählt. Es wird erwartet, daß in den kommenden Jahren viele Halbleiterunternehmen zu BSIM3 wechseln.\u003cbr\u003e Dieses Buch erläutert die technischen Einzelheiten von BSIM 3, warum sich die meisten Unternehmen für dieses Modell entscheiden und wo es eingesetzt werden kann. Eines der fünf Kapitel widmet sich BSIM4, dem Nachfolgemodell von BSIM3.\u003c\/font\u003e\u003c\/strong\u003e\u003c\/p\u003e\r\n\r\n\u003cp\u003e\u003cfont size=\"3\"\u003e\u003cb\u003ePreface.\u003c\/b\u003e  \u003cp\u003e\u003cb\u003e1 Modeling Jargons.\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e1.1 SPICE Simulator and SPICE Model.\u003c\/p\u003e \u003cp\u003e1.2 Numerical Iteration and Convergence.\u003c\/p\u003e \u003cp\u003e1.3 Digital vs. Analog Models.\u003c\/p\u003e \u003cp\u003e1.4 Smoothing Function and Single Equation.\u003c\/p\u003e \u003cp\u003e1.5 Chain Rule.\u003c\/p\u003e \u003cp\u003e1.6 Quasi-Static Approximation.\u003c\/p\u003e \u003cp\u003e1.7 Terminal Charges and Charge Partition.\u003c\/p\u003e \u003cp\u003e1.8 Charge Conservation.\u003c\/p\u003e \u003cp\u003e1.9 Non-Quasi-Static and Quasi-Static \u003ci\u003ey\u003c\/i\u003e-Parameters.\u003c\/p\u003e \u003cp\u003e1.10 Source-Referencing and Inverse Modeling.\u003c\/p\u003e \u003cp\u003e1.11 Physical Model and Table-Lookup Model.\u003c\/p\u003e \u003cp\u003e1.12 Scalable Model and Device Binning.\u003c\/p\u003e \u003cp\u003eReferences and Notes.\u003c\/p\u003e \u003cp\u003e\u003cb\u003e2 Basic Facts About BSIM3.\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e2.1 What Is and What's Not Implemented in BSIM3.\u003c\/p\u003e \u003cp\u003e2.2 DC Equivalent Circuit Model.\u003c\/p\u003e \u003cp\u003e2.3 BSIM3's ^-Parameters.\u003c\/p\u003e \u003cp\u003e2.4 Large-Signal Equivalent Circuit.\u003c\/p\u003e \u003cp\u003e2.5 Small-Signal Model.\u003c\/p\u003e \u003cp\u003e2.6 Noise Equivalent Circuit.\u003c\/p\u003e \u003cp\u003e2.7 Special Operating Conditions: \u003ci\u003eVDS \u0026lt;\u003c\/i\u003e0, \u003ci\u003eVBS \u0026gt;\u003c\/i\u003e 0, \u003ci\u003eVGS \u0026lt;\u003c\/i\u003e0, or \u003ci\u003eVBD\u003c\/i\u003e \u0026gt; 0\u0026gt;.\u003c\/p\u003e \u003cp\u003eReferences and Notes.\u003c\/p\u003e \u003cp\u003e\u003cb\u003e3 BSIM3 Parameters.\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e3.1 List of Parameters According to Function.\u003c\/p\u003e \u003cp\u003e3.2 Alphabetical Glossary of BSIM3 Parameters.\u003c\/p\u003e \u003cp\u003e3.3 Flow Diagram of SPICE Simulation.\u003c\/p\u003e \u003cp\u003eReferences and Notes.\u003c\/p\u003e \u003cp\u003e\u003cb\u003e4 Improvable Areas of BSIM3.\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e4.1 Lack of Robust Non-Quasi-Static Models: Transient Analysis.\u003c\/p\u003e \u003cp\u003e4.2 Problem with the 40\/60 Partition: The \"Killer NOR Gate\".\u003c\/p\u003e \u003cp\u003e4.3 Lack of Channel Resistance (NQS Effect; Small-Signal Analysis).\u003c\/p\u003e \u003cp\u003e4.4 Incorrect Transconductance Dependency on Frequency.\u003c\/p\u003e \u003cp\u003e4.5 Lack of Gate Resistance (and Associated Noise).\u003c\/p\u003e \u003cp\u003e4.6 Lack of Substrate Distributed Resistance (and Associated Noise).\u003c\/p\u003e \u003cp\u003e4.7 Incorrect Source\/Drain Asymmetry at \u003ci\u003eVDS\u003c\/i\u003e = 0.\u003c\/p\u003e \u003cp\u003e4.8 Incorrect \u003ci\u003eCgb\u003c\/i\u003e Behaviors.\u003c\/p\u003e \u003cp\u003e4.9 Capacitances with Wrong Signs.\u003c\/p\u003e \u003cp\u003e4.10 \u003ci\u003eCgg\u003c\/i\u003e Fit and Other Capacitance Issues.\u003c\/p\u003e \u003cp\u003e4.11 Insufficient Noise Modeling (No Excess Short-Channel Thermal Noise).\u003c\/p\u003e \u003cp\u003e4.12 Insufficient Noise Modeling (No Channel-Induced Gate Noise).\u003c\/p\u003e \u003cp\u003e4.13 Incorrect Noise Figure Behavior.\u003c\/p\u003e \u003cp\u003e4.14 Inconsistent Input-Referred Noise Behavior.\u003c\/p\u003e \u003cp\u003e4.15 Possible Negative Transconductances.\u003c\/p\u003e \u003cp\u003e4.16 Lack of GIDL (Gate-Induced Drain Leakage) Current.\u003c\/p\u003e \u003cp\u003e4.17 Incorrect Subthreshold Behaviors.\u003c\/p\u003e \u003cp\u003e4.18 Threshold Voltage Rollup.\u003c\/p\u003e \u003cp\u003e4.19 Problems Associated with a Nonzero RDSW.\u003c\/p\u003e \u003cp\u003e4.20 Other Nuisances.\u003c\/p\u003e \u003cp\u003eReferences and Notes.\u003c\/p\u003e \u003cp\u003e\u003cb\u003e5. Improvements in BSIM4.\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e5.1 Introduction.\u003c\/p\u003e \u003cp\u003e5.2 Physical and Electrical Oxide Thicknesses.\u003c\/p\u003e \u003cp\u003e5.3 Strong Inversion Potential for Vertical Nonuniform Doping Profile.\u003c\/p\u003e \u003cp\u003e5.4 Threshold Voltage Modifications.\u003c\/p\u003e \u003cp\u003e5.5 \u003ci\u003eVGST^\u003c\/i\u003e in Moderate Inversion.\u003c\/p\u003e \u003cp\u003e5.6 Drain Conductance Model.\u003c\/p\u003e \u003cp\u003e5.7 Mobility Model.\u003c\/p\u003e \u003cp\u003e5.8 Diode Capacitance.\u003c\/p\u003e \u003cp\u003e5.9 Diode Breakdown.\u003c\/p\u003e \u003cp\u003e5.10 GIDL (Gate-Induced Drain Leakage) Current.\u003c\/p\u003e \u003cp\u003e5.11 Bias-Dependent Drain-Source Resistance.\u003c\/p\u003e \u003cp\u003e5.12 Gate Resistance.\u003c\/p\u003e \u003cp\u003e5.13 Substrate Resistance.\u003c\/p\u003e \u003cp\u003e5.14 Overlap Capacitance.\u003c\/p\u003e \u003cp\u003e5.15 Thermal Noise Models.\u003c\/p\u003e \u003cp\u003e5.16 Flicker Noise Model.\u003c\/p\u003e \u003cp\u003e5.17 Non-Quasi-Static AC Model.\u003c\/p\u003e \u003cp\u003e5.18 Gate Tunneling Currents.\u003c\/p\u003e \u003cp\u003e5.19 Layout-Dependent Parasitics.\u003c\/p\u003e \u003cp\u003eReferences and Notes.\u003c\/p\u003e \u003cp\u003e\u003cb\u003eAppendixes.\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003eA BSIM3 Equations.\u003c\/p\u003e \u003cp\u003eB Capacitances and Charges for All Bias Conditions.\u003c\/p\u003e \u003cp\u003eC Non-Quasi-Static ^-Parameters.\u003c\/p\u003e \u003cp\u003eD Fringing Capacitance.\u003c\/p\u003e \u003cp\u003eE BSIM3 Non-Quasi-Static Modeling.\u003c\/p\u003e \u003cp\u003eF Noise Figure.\u003c\/p\u003e \u003cp\u003eG BSIM4 Equations.\u003c\/p\u003e \u003cp\u003e\u003cb\u003eIndex.\u003c\/b\u003e\u003c\/p\u003e\u003c\/font\u003e\u003c\/p\u003e\r\n\r\n\u003cp\u003e\u003cfont size=\"3\"\u003eSubject Areas: Electronics \u0026amp; communications engineering [\u003ca title=\"See our other books on Electronics \u0026amp; communications engineering\" href=\"https:\/\/freshlyprintedbooks.co.uk\/search?q=%22Electronics%20\u0026amp;%20communications%20engineering%20%5BTJ%5D%22\"\u003eTJ\u003c\/a\u003e]\u003c\/font\u003e\u003c\/p\u003e\r\n\r\n\r\n\u003c\/font\u003e","brand":"Wiley-IEEE Press","offers":[{"title":"Brand New","offer_id":52293467373848,"sku":"9780471396970","price":163.65,"currency_code":"GBP","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0730\/2037\/5320\/files\/9780471396970.jpg?v=1781640537","url":"https:\/\/freshlyprintedbooks.co.uk\/products\/mosfet-models-for-spice-simulation-including-bsim3v3-and-bsim4-hardback-9780471396970","provider":"Freshly Printed Books","version":"1.0","type":"link"}