{"product_id":"advanced-backend-code-optimization-hardback-9781848215382","title":"Advanced Backend Code Optimization (Hardback) 9781848215382","description":"\u003cfont face=\"Georgia\"\u003e\r\n\u003cp\u003e\u003cfont size=\"6\"\u003eAdvanced Backend Code Optimization\u003c\/font\u003e\u003cbr\u003e\r\n\r\n\r\n\r\n\r\n\r\n\u003c\/p\u003e\n\u003cp\u003e\u003cfont size=\"4\"\u003eSid Touati (Author), Benoit Dupont de Dinechin (Author)\u003c\/font\u003e\u003c\/p\u003e\r\n\r\n\u003cp\u003e\u003cfont size=\"3\"\u003e9781848215382, Wiley\u003c\/font\u003e\u003c\/p\u003e\r\n\r\n\u003cp\u003e\u003cfont size=\"3\"\u003eHardback, published 23 May 2014\u003c\/font\u003e\u003c\/p\u003e\r\n\r\n\u003cp\u003e\u003cfont size=\"3\"\u003e384 pages\u003cbr\u003e24.1 x 16.3 x 2.7 cm, 0.708 kg\u003c\/font\u003e\u003c\/p\u003e\r\n\r\n\r\n\r\n\r\n\r\n\u003cp align=\"justify\"\u003e\u003cstrong\u003e\u003cfont size=\"3\"\u003e\u003cp\u003eThis book is a summary of more than a decade of research in the area of backend optimization. It contains the latest fundamental research results in this field. While existing books are often more oriented toward Masters students, this book is aimed more towards professors and researchers as it contains more advanced subjects.\u003cbr\u003eIt is unique in the sense that it contains information that has not previously been covered by other books in the field, with chapters on phase ordering in optimizing compilation; register saturation in instruction level parallelism; code size reduction for software pipelining; memory hierarchy effects and instruction level parallelism.\u003cbr\u003eOther chapters provide the latest research results in well-known topics such as register need, and software pipelining and periodic register allocation.\u003c\/p\u003e\u003c\/font\u003e\u003c\/strong\u003e\u003c\/p\u003e\r\n\r\n\u003cp\u003e\u003cfont size=\"3\"\u003e\u003cp\u003eIntroduction xiii\u003c\/p\u003e \u003cp\u003e\u003cb\u003ePart 1 Prolog: Optimizing Compilation 1\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003eChapter 1 On the Decidability of Phase Ordering in Optimizing Compilation 3\u003c\/p\u003e \u003cp\u003e\u003cb\u003ePart 2 Instruction Scheduling 23\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003eChapter 2 Instruction Scheduling Problems and Overview 25\u003c\/p\u003e \u003cp\u003eChapter 3 Applications of Machine Scheduling to Instruction Scheduling 39\u003c\/p\u003e \u003cp\u003eChapter 4 Instruction Scheduling Before Register Allocation 51\u003c\/p\u003e \u003cp\u003eChapter 5 Instruction Scheduling After Register Allocation 77\u003c\/p\u003e \u003cp\u003eChapter 6 Dealing in Practice with Memory Hierarchy Effects and Instruction Level Parallelism 91\u003c\/p\u003e \u003cp\u003e\u003cb\u003ePart 3 Register Optimization 119\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003eChapter 7 The Register Need of a Fixed Instruction Schedule 121\u003c\/p\u003e \u003cp\u003eChapter 8 The Register Saturation 141\u003c\/p\u003e \u003cp\u003eChapter 9 Spill Code Reduction 159\u003c\/p\u003e \u003cp\u003eChapter 10 Exploiting the Register Access Delays Before Instruction Scheduling 177\u003c\/p\u003e \u003cp\u003eChapter 11 Loop Unrolling Degree Minimization for Periodic Register Allocation 191\u003c\/p\u003e \u003cp\u003e\u003cb\u003ePart 4 Epilog: Performance, Open Problems 231\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003eChapter 12 Statistical Performance Analysis: The Speedup-Test Protocol 233\u003c\/p\u003e \u003cp\u003eConclusion 257\u003c\/p\u003e \u003cp\u003eAppendix 1 Presentation of the Benchmarks Used in Our Experiments 263\u003c\/p\u003e \u003cp\u003eAppendix 2 Register Saturation Computation on Stand-Alone DDG 271\u003c\/p\u003e \u003cp\u003eAppendix 3 Efficiency of SIRA on the Benchmarks 279\u003c\/p\u003e \u003cp\u003eAppendix 4 Efficiency of Non-Positive Circuit Elimination in the SIRA Framework 293\u003c\/p\u003e \u003cp\u003eAppendix 5 Loop Unroll Degree Minimization: Experimental Results 303\u003c\/p\u003e \u003cp\u003eAppendix 6 Experimental Efficiency of Software Data Preloading and Prefetching for Embedded VLIW 313\u003c\/p\u003e \u003cp\u003eAppendix 7 Appendix of the Speedup-Test Protocol 319\u003c\/p\u003e \u003cp\u003eBibliography 327\u003c\/p\u003e \u003cp\u003eLists of Figures, Tables and Algorithms 345\u003c\/p\u003e \u003cp\u003eIndex 353\u003c\/p\u003e\u003c\/font\u003e\u003c\/p\u003e\r\n\r\n\u003cp\u003e\u003cfont size=\"3\"\u003eSubject Areas: Computer programming \/ software development [\u003ca title=\"See our other books on Computer programming \/ software development\" href=\"https:\/\/freshlyprintedbooks.co.uk\/search?q=%22Computer%20programming%20\/%20software%20development%20%5BUM%5D%22\"\u003eUM\u003c\/a\u003e]\u003c\/font\u003e\u003c\/p\u003e\r\n\r\n\r\n\u003c\/font\u003e","brand":"Wiley-ISTE","offers":[{"title":"Brand New","offer_id":52511287476504,"sku":"9781848215382","price":110.39,"currency_code":"GBP","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0730\/2037\/5320\/files\/9781848215382.jpg?v=1786594695","url":"https:\/\/freshlyprintedbooks.co.uk\/products\/advanced-backend-code-optimization-hardback-9781848215382","provider":"Freshly Printed Books","version":"1.0","type":"link"}